A basic digital input circuit contains two or more chained inverter stages. In order to guarantee enough tolerance to noise, an input low voltage, Vil, and an input high voltage, Vih, switch levels at the input are specified. Modern integrated circuit requirements have pushed the two specifications closer and closer. For example, in current digital circuits using a 3.3V supply voltage, Vdd, one often finds Vil=0.3 Vdd and Vih=0.4 Vdd, resulting in a window of 0.1 Vdd which is only 0.33V.
However, the variation of the integrated circuit manufacturing process may introduce a shift in the input switching voltage level, or toggle voltage, Vtgl. We define the toggle voltage, Vtgl, as the input voltage at which the output voltage of an inverter chain is equal to 0.5 Vdd. The purpose of defining Vtgl is as the input voltage sweeps, the output of an inverter changes very steeply when flipping from one state to another state. The extent of the Vtgl variation range is mainly dependent on manufacturing process variations. Its magnitude must lie within the Vil and Vih range. The manufacturing process variation, therefore, reduces the noise margin of the whole circuit.
Three US patents are known which deal with the subject of circuit compensation for manufacturing process variation.
U.S. Pat. No. 5,111,081 (Atallah) provides a CMOS inverter in which variations in process are compensated for by varying the W/L ratio of the inverter FET devices by means of switching in selected other FETs in parallel with the inverter FET devices.
U.S. Pat. No. 4,975,599 (Petrovick, Jr. et al.) provides a technique for compensating for process variation in CMOS driver circuits using 5-transistor compensation circuits for control of each output device in the driver. In this patent the compensation is intended to stabilize the speed of operation of the driver.
U.S. Pat. No. 5,434,532 (Thiel) discloses a voltage reference circuit including CMOS devices for compensation of process variation in transistor circuits.